Technical Field
Embodiments described herein generally relate to processors. In particular, embodiments described herein generally relate to memory access synchronization in processors.
Background Information
Multithreaded software, and other software executed in environments where multiple entities may potentially access the same shared memory, typically includes one or more types of memory access synchronization instructions. Various such instructions are known in the arts. Examples include memory access fence or barrier instructions, lock instructions, conditional memory access instructions, and the like. These memory access synchronization instructions are generally needed in order to help ensure that accesses to the shared memory occur in the appropriate order (e.g., occur consistently with the original program order) and thereby help to prevent erroneous results.